CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0622 (2013.01); G06F 3/0688 (2013.01); G06F 13/1668 (2013.01); G06F 13/4282 (2013.01); G06F 2213/0024 (2013.01)] | 20 Claims |
1. A memory system comprising:
one or more memory devices; and
a processing device, operatively coupled with the one or more memory devices, to perform operations comprising:
providing a plurality of virtual memory controllers;
providing a plurality of physical functions, wherein each of the plurality of physical functions corresponds to a different one of the plurality of virtual memory controllers;
partitioning the one or more memory devices into a plurality of physical partitions;
associating each of the plurality of virtual memory controllers with a respective one of the plurality of physical partitions and a respective one of the plurality of physical functions; and
presenting the plurality of physical functions to a host computing system over a peripheral component interconnect express (PCIe) interface to provide access to the plurality of virtual memory controllers and the associated plurality of physical partitions.
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