US 11,836,087 B2
Per-process re-configurable caches
Dmitri Yudanov, Rancho Cordova, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Dec. 23, 2020, as Appl. No. 17/132,537.
Prior Publication US 2022/0197814 A1, Jun. 23, 2022
Int. Cl. G06F 12/08 (2016.01); G06F 12/0893 (2016.01)
CPC G06F 12/0893 (2013.01) [G06F 2212/608 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A method comprising:
initiating a new process, the new process associated with a process context associated with the new process in a memory device upon initiation and including data structures used by the new process during execution;
determining one or more cache parameters based on memory accesses of the previous instantiations based on monitored memory accesses of previous instantiations of the new process, the one or more cache parameters comprising categorical parameters that control how the new process accesses an assigned region of the memory device, wherein the one or more cache parameters are shared among the new process and one or more other processes;
configuring a region in the memory device based on the one or more cache parameters, the region associated with the allocated process context; and
mapping the process context to the region of the memory device.