US 11,836,084 B2
Embedding data in address streams
David Andrew Roberts, Wellesley, MA (US)
Assigned to Micron Technology, Inc, Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jun. 27, 2022, as Appl. No. 17/809,126.
Application 17/809,126 is a continuation of application No. 16/879,688, filed on May 20, 2020, granted, now 11,379,376.
Prior Publication US 2022/0327059 A1, Oct. 13, 2022
Int. Cl. G11C 5/06 (2006.01); G06F 12/06 (2006.01); G06F 11/10 (2006.01); G06F 12/0882 (2016.01); G06F 12/0868 (2016.01); G06F 9/54 (2006.01); G06F 11/30 (2006.01); G06F 9/50 (2006.01); G01R 31/317 (2006.01)
CPC G06F 12/0882 (2013.01) [G06F 9/5016 (2013.01); G06F 9/546 (2013.01); G06F 11/1004 (2013.01); G06F 11/1068 (2013.01); G06F 11/3037 (2013.01); G06F 12/06 (2013.01); G06F 12/0868 (2013.01); G11C 5/066 (2013.01); G01R 31/31713 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus comprising:
an interconnect configured to propagate an address stream and a data stream;
a memory device coupled to the interconnect; and
a host device coupled to the interconnect and configured to:
communicate an indication of data via the address stream of the interconnect, the indication of data comprising a pattern of memory addresses within a plurality of addresses in the address stream, the data comprising information other than memory addresses for read or write operations at the plurality of addresses, the data effective to enable the memory device, in response to a determination of the data, to not perform the read or write operations at the plurality of addresses.