CPC G06F 12/0882 (2013.01) [G06F 12/0833 (2013.01); G06F 12/0835 (2013.01); G06F 13/1673 (2013.01)] | 21 Claims |
1. A compute node, comprising:
a memory, to store memory pages;
a peripheral bus;
a processor, which is to run software that accesses the memory, and to identify one or more first memory pages that are accessed by the software in the memory; and
a peripheral device, which is to:
directly access one or more second memory pages in the memory of the compute node using Direct Memory Access (DMA); and
notify the processor of the second memory pages that were accessed using DMA,
wherein the processor is further to maintain a data structure that tracks both (i) the first memory pages as identified by the processor and (ii) the second memory pages as notified by the peripheral device, and wherein the peripheral device is to notify the processor of the second memory pages by writing over the peripheral bus directly into the data structure.
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