US 11,816,351 B2
Write operation circuit, semiconductor memory, and write operation method
Liang Zhang, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Apr. 26, 2021, as Appl. No. 17/241,012.
Application 17/241,012 is a continuation of application No. PCT/CN2020/097505, filed on Jun. 22, 2020.
Claims priority of application No. 201911021590.5 (CN), filed on Oct. 25, 2019.
Prior Publication US 2021/0247926 A1, Aug. 12, 2021
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0655 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A write operation circuit applied to a semiconductor memory, the write operation circuit comprising:
a data determination module, configured to determine whether to flip a current input data of the semiconductor memory depending on a number of changed data bits between a previous input data and the current input data of the semiconductor memory to generate a flip flag data and an intermediate data;
a data buffer module, coupled to the data determination module and configured to determine an initial state of a global bus based on an enable signal and the intermediate data; and
a data receiving module coupled to a memory bank, wherein the data receiving module is configured to receive a global bus data on the global bus, receive the flip flag data through a flip flag signal line, decode the global bus data according to the flip flag data, and write a decoded data into the memory bank of the semiconductor memory, wherein the decoding comprises determining whether to flip the global bus data.