CPC G01S 7/354 (2013.01) [G01S 7/52047 (2013.01); G01S 13/42 (2013.01); G01S 7/356 (2021.05); G01S 13/931 (2013.01)] | 17 Claims |
1. An apparatus comprising:
a radar circuit with signal transmission circuitry to transmit radar signals and with signal reception circuitry to receive, in response, reflection signals as reflections from objects; and
computer processing circuitry to process data corresponding to the reflection signals in a multi-input multi-output (MIMO) virtual array characterized by having at least three embedded uniform sparse linear arrays, each of the at least three embedded uniform sparse linear arrays being associated with a unique antenna-element spacing from among a set of unique co-prime antenna-element spacings, wherein spacing values of the at least three embedded sparse linear arrays are co-prime, pairwise, and the at least three embedded sparse linear arrays form an array of sparse aperture of a size corresponding to a lowest common multiple of the spacing values.
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