CPC H02M 3/155 (2013.01) [H02M 1/08 (2013.01); H03K 5/24 (2013.01)] | 18 Claims |
1. A circuit, comprising:
a state machine configured to:
operate in a first state in which the state machine gates a pulse width modulation (PWM) signal provided for control of a power converter according to a first signal provided by a voltage control loop;
operate in a second state in which the state machine gates the PWM signal according to a second signal provided by a current limit comparator, wherein the current limit comparator is configured to be gated by a blanking signal, wherein an assertion time of the blanking signal is based on a switching frequency of the power converter;
transition from the first state to the second state responsive to the second signal being asserted after the first signal is asserted in a switching cycle of the power converter; and
transition from the second state to the first state responsive to the first signal being asserted after the second signal in a switching cycle of the power converter.
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