CPC H02M 1/4225 (2013.01) [H02M 1/4216 (2013.01); H02M 1/12 (2013.01)] | 20 Claims |
1. A controller for a PFC (power factor correction) system having a plurality of phases for delivering current to a load, the controller comprising a digital circuitry configured to:
calculate a delay value based on a positive current slope and a negative current slope for a first phase of the plurality of phases which is enabled for all load current conditions; and
in response to an increase in an average current reference, enable a second phase of the plurality of phases such that a current output by the second phase is out of phase with a current output by the first phase by an amount corresponding to the delay value as referenced to a beginning of a boost charging portion of a switching cycle for the first phase.
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