US 11,810,973 B2
Semiconductor structure and method of forming thereof
Yi-Huan Chen, Hsinchu (TW); Chien-Chih Chou, New Taipei (TW); Szu-Hsien Liu, Hsinchu County (TW); and Kong-Beng Thei, Hsinchu County (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed on May 14, 2021, as Appl. No. 17/321,216.
Prior Publication US 2022/0367708 A1, Nov. 17, 2022
Int. Cl. H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01)
CPC H01L 29/7813 (2013.01) [H01L 29/0646 (2013.01); H01L 29/66734 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a substrate;
a doped region within the substrate;
a pair of source/drain regions extending along a first direction on opposite sides of the doped region;
a gate electrode disposed in the doped region, wherein the gate electrode has a plurality of first segments between the pair of source/drain regions and extending in parallel along the first direction; and
a protection structure over the substrate and at least partially overlapping the gate electrode.