US 11,810,956 B2
In-situ thermal annealing of electrode to form seed layer for improving FeRAM performance
Yen-Chieh Huang, Changhua County (TW); Po-Ting Lin, Taichung (TW); Song-Fu Liao, Taipei (TW); Hai-Ching Chen, Hsinchu (TW); and Chung-Te Lin, Tainan (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jan. 6, 2022, as Appl. No. 17/570,028.
Claims priority of provisional application 63/278,241, filed on Nov. 11, 2021.
Prior Publication US 2023/0143625 A1, May 11, 2023
Int. Cl. H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 21/28 (2006.01); H10B 51/00 (2023.01)
CPC H01L 29/40111 (2019.08) [H01L 29/6684 (2013.01); H01L 29/78391 (2014.09); H10B 51/00 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A method for forming an integrated circuit (IC), comprising:
forming a first electrode layer comprising a first metal over a substrate;
performing a first atomic layer deposition (ALD) pulse that exposes the first electrode layer to oxygen atoms;
exposing the first electrode layer to a first temperature, wherein the first temperature causes the first electrode layer to react with the oxygen atoms to form a seed structure over the first electrode layer; and
performing a series of ALD pulses at a second temperature to form a ferroelectric structure over the seed structure, wherein the second temperature is less than the first temperature and wherein the ferroelectric structure is configured to store a data state.