US 11,810,846 B2
Semiconductor device and method of manufacture
Chia-Ching Tsai, Tainan (TW); Yi-Wei Chiu, Kaohsiung (TW); Hung Jui Chang, Shetou Shiang (TW); and Li-Te Hsu, Shanhua Township (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on May 3, 2021, as Appl. No. 17/306,319.
Application 17/306,319 is a division of application No. 16/108,535, filed on Aug. 22, 2018, granted, now 10,998,259.
Claims priority of provisional application 62/552,795, filed on Aug. 31, 2017.
Prior Publication US 2021/0257285 A1, Aug. 19, 2021
Int. Cl. H01L 23/498 (2006.01); H01L 21/768 (2006.01)
CPC H01L 23/49827 (2013.01) [H01L 21/76816 (2013.01); H01L 21/76831 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, the method comprising:
forming a dielectric layer over a first etch stop layer over a conductive feature;
forming an anti-reflective layer over the dielectric layer;
forming a first hard mask over the anti-reflective layer;
patterning the first hard mask to have a first opening larger than a second opening through the anti-reflective layer;
forming a first via opening and a first trench opening through the dielectric layer, wherein the forming the first via opening and the first trench opening is performed by etching through both the first opening and the second opening with a single etching process;
removing the first hard mask; and
removing a portion of the first etch stop layer through the first via opening, wherein after the removing the portion of the first etch stop layer has been stopped the via opening has a first profile angle of between about 70° and about 80°, wherein the removing the portion of the first etch stop layer also rounds a corner of the anti-reflective layer.