US 11,810,819 B2
Metal gates of transistors having reduced resistivity
Chia-Ching Tsai, Tainan (TW); Yi-Wei Chiu, Kaohsiung (TW); and Li-Te Hsu, Shanhua Township (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on May 20, 2021, as Appl. No. 17/325,608.
Application 17/325,608 is a continuation of application No. 17/087,058, filed on Nov. 2, 2020, granted, now 11,430,694.
Application 17/087,058 is a continuation of application No. 16/715,651, filed on Dec. 16, 2019, granted, now 10,825,727, issued on Nov. 3, 2020.
Application 16/715,651 is a continuation of application No. 16/191,908, filed on Nov. 15, 2018, granted, now 10,510,596, issued on Dec. 17, 2019.
Application 16/191,908 is a continuation of application No. 15/613,485, filed on Jun. 5, 2017, granted, now 10,141,225, issued on Nov. 27, 2018.
Claims priority of provisional application 62/491,823, filed on Apr. 28, 2017.
Prior Publication US 2021/0280464 A1, Sep. 9, 2021
Int. Cl. H01L 29/66 (2006.01); H01L 21/28 (2006.01); H01L 21/768 (2006.01); H01L 29/78 (2006.01); H01L 29/08 (2006.01); H01L 29/49 (2006.01); H01L 23/535 (2006.01); H01L 23/532 (2006.01); H01L 29/417 (2006.01); H01L 29/51 (2006.01)
CPC H01L 21/76889 (2013.01) [H01L 21/28088 (2013.01); H01L 21/7684 (2013.01); H01L 21/76805 (2013.01); H01L 21/76843 (2013.01); H01L 21/76895 (2013.01); H01L 23/535 (2013.01); H01L 23/53209 (2013.01); H01L 29/0847 (2013.01); H01L 29/41791 (2013.01); H01L 29/4966 (2013.01); H01L 29/665 (2013.01); H01L 29/6656 (2013.01); H01L 29/66545 (2013.01); H01L 29/66553 (2013.01); H01L 29/66636 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 29/7851 (2013.01); H01L 29/513 (2013.01); H01L 29/517 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit device comprising:
a substrate;
a gate electrode on the substrate;
a source/drain region extending into the substrate and spaced apart from the gate electrode;
a first gate contact plug over and contacting the gate electrode; and
a second gate contact plug over and contacting the first gate contact plug, wherein an upper width of the first gate contact plug is greater than a lower width of the second gate contact plug, and the second gate contact plug comprises cobalt or a metal silicide.