CPC G06F 21/552 (2013.01) [G01R 21/00 (2013.01); G01R 31/2832 (2013.01); G01R 31/2887 (2013.01); G01R 31/2891 (2013.01); G01R 31/2893 (2013.01); G06F 21/32 (2013.01); G06F 21/755 (2017.08); G01R 1/0408 (2013.01); G01R 31/2886 (2013.01); G06F 2221/034 (2013.01)] | 12 Claims |
1. An apparatus, comprising:
a circuit anomaly detector configured to monitor a side-channel output from a target circuit chip over a plurality of times to define a time-related performance of the target device, the circuit anomaly detector configured to detect an anomaly at the target device to define a detected anomaly based on at least one of (1) the time-related performance of the target device, or (2) the time-related performance of the target device and a time-related performance of a plurality of devices similar to or common as the target device; and
a notification processor communicatively coupled to the circuit anomaly detector, the notification processor configured to send a notification message to a device designated to respond to the detected anomaly,
the plurality of times includes a time of an initial manufacture of the target circuit chip, a time the target circuit chip is installed on a printed circuit board assembly (PCBA), and a time the PCBA is installed in a device.
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