US 11,809,350 B2
Serial interrupt method, device, serial interrupt processing method, and processor
Xiaofan Zhao, Tianjin (CN); Lizheng Fan, Tianjin (CN); Cai Chen, Tianjin (CN); and Fudong Liu, Tianjin (CN)
Assigned to PHYTIUM TECHNOLOGY CO., LTD., Tianjin (CN)
Filed by Phytium Technology Co., Ltd., Tianjin (CN)
Filed on Jan. 13, 2022, as Appl. No. 17/575,212.
Claims priority of application No. 202110053108.7 (CN), filed on Jan. 15, 2021.
Prior Publication US 2022/0229792 A1, Jul. 21, 2022
Int. Cl. G06F 13/24 (2006.01); G06F 9/30 (2018.01); G06F 9/48 (2006.01); G06F 13/38 (2006.01); G06F 13/42 (2006.01)
CPC G06F 13/24 (2013.01) [G06F 9/30101 (2013.01); G06F 9/4812 (2013.01); G06F 13/385 (2013.01); G06F 13/4291 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A serial interrupt method comprising:
receiving a blank serial interrupt request signal (SerIRQ) from either a processor or a peripheral and a peripheral level signal from the peripheral;
based on the blank SerIRQ, generating an indication SerIRQ including a plurality of indication interrupt bits according to the peripheral level signal, the plurality of indication interrupt bits including a binary code represented by a first level and a second level to identify the peripheral; and
sending the indication SerIRQ to the processor.