CPC G06F 13/1663 (2013.01) [C07F 15/0033 (2013.01); G06F 12/082 (2013.01); G06F 12/0822 (2013.01); G06F 12/0831 (2013.01); G06F 12/1018 (2013.01); H04L 12/4625 (2013.01); H04L 49/9068 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/621 (2013.01)] | 25 Claims |
1. A network interface, comprising:
a hardware bus interface circuit to communicatively couple the network interface to a host computer, wherein the host computer has a central processor unit (CPU);
a memory circuit comprising a shareable memory region that can be cache coherently mapped to an address space of the host computer;
a coprocessor circuit to provide an accelerated network support function via the shareable memory region; and
a caching agent (CA) circuit to maintain cache coherency between the coprocessor and the CPU via the shareable memory region.
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