US 11,808,806 B2
Allocation of test resources to perform a test of memory components
Aswin Thiruvengadam, Folsom, CA (US); Sivagnanam Parthasarathy, Carlsbad, CA (US); and Frederick Jensen, El Dorado Hills, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Aug. 10, 2021, as Appl. No. 17/398,645.
Application 17/398,645 is a division of application No. 16/209,393, filed on Dec. 4, 2018, granted, now 11,131,705.
Prior Publication US 2021/0373072 A1, Dec. 2, 2021
Int. Cl. G01R 31/28 (2006.01); G01R 31/00 (2006.01)
CPC G01R 31/2874 (2013.01) [G01R 31/003 (2013.01); G01R 31/287 (2013.01); G01R 31/2862 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a memory component; and
a processing device, operatively coupled with the memory component, to:
receive a request to perform a first test of the memory component at a test platform;
identify a plurality of test sockets of the test platform;
identify, among the plurality of test sockets, a subset of test sockets not being used by a second test of the plurality of memory component at the test platform; and
assign a test socket, selected from the subset of test sockets, to obtain an assigned test socket for use by the first test.