CPC H04W 72/23 (2023.01) [H04L 1/1819 (2013.01); H04W 72/1263 (2013.01)] | 30 Claims |
1. An apparatus for wireless communication at a user equipment (UE), comprising:
a memory; and
one or more processors coupled to the memory, wherein the one or more processors are configured to:
receive configuration information indicating a first semi-persistent scheduling (SPS) configuration and a second SPS configuration, wherein one or more first SPS occasions defined by the first SPS configuration and one or more second SPS occasions defined by the second SPS configuration are within a time interval associated with a traffic burst of a communication, the time interval being based at least in part on an expected jitter of the communication;
receive downlink control information (DCI) activating at least one SPS configuration, of the first SPS configuration and the second SPS configuration; and
perform the communication using the at least one activated SPS configuration.
|