US 11,792,398 B2
Video encoding
Prashanth N. Subramanya, Karnataka (IN); and Ramakrishna Adireddy, Andhra Pradesh (IN)
Assigned to Texas Instruments Incorporated, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on Dec. 21, 2021, as Appl. No. 17/557,558.
Application 17/557,558 is a continuation of application No. 17/035,813, filed on Sep. 29, 2020, granted, now 11,240,502.
Application 17/035,813 is a continuation of application No. 16/290,256, filed on Mar. 1, 2019, granted, now 10,834,401, issued on Nov. 10, 2020.
Application 16/290,256 is a continuation of application No. 14/755,559, filed on Jun. 30, 2015, granted, now 10,264,257, issued on Apr. 16, 2019.
Prior Publication US 2022/0116609 A1, Apr. 14, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H04N 19/12 (2014.01); H04N 19/124 (2014.01); H04N 19/96 (2014.01); H04N 19/103 (2014.01)
CPC H04N 19/124 (2014.11) [H04N 19/103 (2014.11); H04N 19/96 (2014.11)] 20 Claims
OG exemplary drawing
 
1. A video processor comprising:
a memory configured to receive a video frame having a plurality of rows of coding tree units (CTUs);
a bus;
a first video processing engine coupled to the bus;
a second video processing engine coupled to the bus; and
a controller coupled to the bus, wherein the controller is configured to assign a first row of the plurality of rows to the first video processing engine and a second row of the plurality of rows to the second video processing engine;
wherein the first video processing engine is configured to:
determine a first estimated quantization parameter (QP) for the first row; and
encode a first CTU of the first row; and
wherein the second video processing engine is configured to:
determine a second estimated QP for the second row;
receive the first estimated QP;
determine a running QP for the second row based on the first estimated QP; and
encode a second CTU of the second row.