CPC H04L 27/2338 (2013.01) [H04L 27/2057 (2013.01); H04L 27/2337 (2013.01); H04L 27/3411 (2013.01)] | 20 Claims |
1. A chip comprising:
a receiver including:
an input node to receive an input data signal;
an encoder to encode the input data signal as differential phase-modulated signals including a first data signal and a second data signal that are differential in phase, a phase shifted signal transition in the first data signal encoding a first binary symbol type and a phase shifted signal transition in the second data signal encoding a second binary symbol type; and
a differential output to output the differential phase-modulated signals including the first data signal and the second data signal.
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