US 11,792,057 B2
Phase modulated data link for low-swing wireline applications
Masum Hossain, Edmonton (CA); Richelle L. Smith, Los Altos, CA (US); and Carl W. Werner, Los Gatos, CA (US)
Assigned to Rambus Inc., San Jose, CA (US)
Filed by Rambus Inc., San Jose, CA (US)
Filed on Jun. 29, 2022, as Appl. No. 17/852,922.
Application 17/852,922 is a continuation of application No. 17/363,557, filed on Jun. 30, 2021, granted, now 11,411,787.
Application 17/363,557 is a continuation of application No. 16/864,079, filed on Apr. 30, 2020, granted, now 11,088,880, issued on Aug. 10, 2021.
Claims priority of provisional application 62/848,550, filed on May 15, 2019.
Prior Publication US 2022/0417067 A1, Dec. 29, 2022
Int. Cl. H04L 27/20 (2006.01); H04L 27/233 (2006.01); H04L 27/34 (2006.01)
CPC H04L 27/2338 (2013.01) [H04L 27/2057 (2013.01); H04L 27/2337 (2013.01); H04L 27/3411 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A chip comprising:
a receiver including:
an input node to receive an input data signal;
an encoder to encode the input data signal as differential phase-modulated signals including a first data signal and a second data signal that are differential in phase, a phase shifted signal transition in the first data signal encoding a first binary symbol type and a phase shifted signal transition in the second data signal encoding a second binary symbol type; and
a differential output to output the differential phase-modulated signals including the first data signal and the second data signal.