CPC H04L 25/0266 (2013.01) [H02K 11/33 (2016.01); H02P 27/08 (2013.01); H03K 19/00323 (2013.01); H03K 19/017509 (2013.01); H03K 19/017545 (2013.01)] | 22 Claims |
1. A digital isolator, comprising:
a transmitter having a transmitter output;
a receiver having a receiver input and a receiver output;
an isolation barrier coupled between the transmitter output and the receiver input, the transmitter configured to transmit an input signal across the isolation barrier;
an output buffer having a buffer input, the output buffer configured to output an isolated signal; and
an interlock circuit having an interlock input coupled to the receiver output and an interlock output coupled to the buffer input, the interlock circuit configured to prevent overlapping active states between the isolated signal and a complementary isolated signal.
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