US 11,791,846 B2
Decoder performing iterative decoding, and storage device using the same
Jae Hun Jang, Hwaseong-si (KR); Dong-Min Shin, Seoul (KR); Heon Hwa Cheong, Seongnam-si (KR); Jun Jin Kong, Yongin-si (KR); Hong Rak Son, Anyang-si (KR); and Se Jin Lim, Seoul (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on May 7, 2021, as Appl. No. 17/314,768.
Application 17/314,768 is a continuation of application No. 15/956,960, filed on Apr. 19, 2018, granted, now 11,031,957.
Claims priority of application No. 10-2017-0139976 (KR), filed on Oct. 26, 2017.
Prior Publication US 2021/0281280 A1, Sep. 9, 2021
Int. Cl. H03M 13/37 (2006.01); H03M 13/03 (2006.01); G06F 13/16 (2006.01); G06F 11/08 (2006.01); G06F 11/10 (2006.01)
CPC H03M 13/37 (2013.01) [G06F 11/085 (2013.01); G06F 11/1012 (2013.01); G06F 13/1673 (2013.01); H03M 13/03 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A storage device comprising:
a first memory;
a second memory; and
a processor configured to:
perform a flag encoding operation on first data generated by the processor during an iterative decoding operation to generate first flag data representing the first data when the flag encoding operation on the first data is successful;
perform the flag encoding operation on second data generated by the processor during the iterative decoding operation and generate second flag data having a predetermined value when the flag encoding operation on the second data is unsuccessful;
store the second data in the first memory based on the second flag data having the predetermined value; and
store the first flag data and the second flag data in the second memory,
wherein the first data is larger than the first flag data, and
the second data is larger than the second flag data.