CPC H03H 11/28 (2013.01) | 9 Claims |
1. An impedance control circuit comprising:
a configuration channel interface coupled to a first universal serial bus device;
a first resistor having a first terminal coupled to the configuration channel interface, and a second terminal;
a first transistor having a first terminal coupled to the second terminal of the first resistor, a second terminal coupled to a system voltage terminal, and a control terminal, wherein the first transistor has a negative threshold voltage;
a second transistor having a first terminal coupled to the second terminal of the first resistor, a second terminal coupled to the system voltage terminal, and a control terminal, wherein the second transistor has a positive threshold voltage;
a second resistor having a first terminal coupled to the second terminal of the first resistor, and a second terminal coupled to the control terminal of the second transistor; and
a third resistor having a first terminal coupled to the second terminal of the second resistor, and a second terminal coupled to the system voltage terminal.
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