CPC H03F 1/56 (2013.01) [H03F 3/45475 (2013.01); H03M 1/12 (2013.01); H03F 2200/129 (2013.01); H03F 2203/45116 (2013.01)] | 24 Claims |
14. An apparatus, comprising:
an analog circuit having a plurality of differential pairs of elements, wherein for each pair of the plurality of differential pairs of elements, the elements of the pair are designed to match but may have mismatch that induces error;
an analog-to-digital converter (ADC) configured to monitor an output of the analog circuit; and
a controller configured to, for each pair of at least two pairs of the plurality of differential pairs of elements:
spectrally separate the mismatch-induced error of the pair from mismatch-induced error of a remainder of the plurality of differential pairs of elements; and
analyze the monitored output to measure the mismatch-induced error of the pair.
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