US 11,791,390 B2
Semiconductor device having an air gap and method for fabricating the same
Se-Han Kwon, Gyeonggi-do (KR); and Dong-Soo Kim, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Nov. 18, 2021, as Appl. No. 17/530,275.
Application 17/530,275 is a continuation of application No. 16/828,250, filed on Mar. 24, 2020, granted, now 11,211,466.
Claims priority of application No. 10-2019-0108106 (KR), filed on Sep. 2, 2019.
Prior Publication US 2022/0077294 A1, Mar. 10, 2022
Int. Cl. H01L 29/49 (2006.01); H01L 29/423 (2006.01); H01L 21/3213 (2006.01); H01L 21/02 (2006.01); H01L 21/67 (2006.01); H01L 21/28 (2006.01); H01L 21/3105 (2006.01); H10B 12/00 (2023.01)
CPC H01L 29/4236 (2013.01) [H01L 21/0217 (2013.01); H01L 21/28088 (2013.01); H01L 21/31056 (2013.01); H01L 21/32136 (2013.01); H01L 21/67075 (2013.01); H01L 29/4238 (2013.01); H01L 29/42368 (2013.01); H01L 29/4966 (2013.01); H01L 29/4991 (2013.01); H10B 12/053 (2023.02); H10B 12/34 (2023.02)] 15 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a substrate including a trench;
a gate electrode and a capping layer which are sequentially stacked to fill the trench; and
a gate dielectric structure that is conformally formed along a surface of the trench and includes an air gap to partially cover side walls of the gate electrode and side walls of the capping layer,
wherein the gate dielectric structure further includes a first gate dielectric layer and a second gate dielectric layer which are vertically formed with the air gap interposed therebetween.