US 11,791,374 B2
Capacitor and method for fabricating the same
Myung-Soo Lee, Seoul (KR); Cheol-Hwan Park, Gyeonggi-do (KR); and Chee-Hong An, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Jan. 3, 2022, as Appl. No. 17/567,625.
Application 17/567,625 is a continuation of application No. 16/824,759, filed on Mar. 20, 2020, granted, now 11,251,260.
Claims priority of application No. 10-2019-0107440 (KR), filed on Aug. 30, 2019.
Prior Publication US 2022/0130947 A1, Apr. 28, 2022
Int. Cl. H10B 12/00 (2023.01); H01L 49/02 (2006.01)
CPC H01L 28/57 (2013.01) [H10B 12/033 (2023.02); H10B 12/315 (2023.02); H10B 12/34 (2023.02)] 10 Claims
OG exemplary drawing
 
1. A method for fabricating a capacitor, comprising:
forming a first conductive layer;
forming a dielectric layer stack in which a leakage blocking material is embedded, on the first conductive layer;
forming a dielectric interface layer on the dielectric layer stack;
forming a high work function interface layer on the dielectric interface layer; and
forming a second conductive layer on the high work function interface layer,
wherein the dielectric interface layer comprises a material having a higher electronegativity than the dielectric layer stack.