US 11,791,308 B2
Semiconductor package
Jihwan Hwang, Hwaseong-si (KR); Unbyoung Kang, Hwaseong-si (KR); Sangsick Park, Hwaseong-si (KR); Jihwan Suh, Suwon-si (KR); Soyoun Lee, Hwaseong-si (KR); and Teakhoon Lee, Hwaseong-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on May 26, 2022, as Appl. No. 17/804,110.
Application 17/804,110 is a continuation of application No. 17/142,133, filed on Jan. 5, 2021, granted, now 11,362,062.
Claims priority of application No. 10-2020-0063275 (KR), filed on May 26, 2020.
Prior Publication US 2022/0285312 A1, Sep. 8, 2022
Int. Cl. H01L 23/00 (2006.01); H01L 25/065 (2023.01); H01L 23/498 (2006.01)
CPC H01L 24/83 (2013.01) [H01L 23/49816 (2013.01); H01L 24/13 (2013.01); H01L 25/0657 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor package comprising:
arranging a wafer on an electrostatic chuck, the wafer including a plurality of base chips;
pre-bonding at least one semiconductor chip on the wafer using an adhesive film;
performing a foil lamination process to cover the at least one semiconductor chip on the wafer with a foil;
performing a pressurized reflow process, wherein the pressurized reflow process is a process of reflowing the adhesive film by applying heat while maintaining a constant pressure in a process chamber; and
removing the foil.