US 11,791,198 B2
Trench shield isolation layer
Hong Yang, Richardson, TX (US); Seetharaman Sridhar, Richardson, TX (US); Ya ping Chen, Chengdu (CN); Fei Ma, Chengdu (CN); Yunlong Liu, Chengdu (CN); and Sunglyong Kim, Allen, TX (US)
Assigned to Texas Instruments Incorporated, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on Mar. 15, 2022, as Appl. No. 17/695,119.
Application 17/695,119 is a division of application No. 16/546,499, filed on Aug. 21, 2019, granted, now 11,302,568.
Application 16/546,499 is a continuation of application No. PCT/CN2019/080340, filed on Mar. 29, 2019.
Prior Publication US 2022/0208601 A1, Jun. 30, 2022
Int. Cl. H01L 21/762 (2006.01); H01L 21/763 (2006.01); H01L 29/66 (2006.01); H01L 21/308 (2006.01); H01L 21/02 (2006.01); H01L 21/324 (2006.01)
CPC H01L 21/76235 (2013.01) [H01L 21/02164 (2013.01); H01L 21/308 (2013.01); H01L 21/324 (2013.01); H01L 21/763 (2013.01); H01L 21/76283 (2013.01); H01L 21/76286 (2013.01); H01L 29/66666 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate having a top surface and a bottom surface located opposite from the top surface, the substrate having a semiconductor material between the top surface and the bottom surface;
a shield in a trench in the substrate, the trench extending from the top surface, the shield being electrically conductive, wherein the semiconductor material extends to the trench, wherein the shield is separated from the semiconductor material by a shield liner in the trench, the shield liner being electrically non-conductive;
a metal oxide semiconductor (MOS) transistor, the MOS transistor including:
a gate in the trench and having a gate bottom surface, the shield extending under the gate bottom surface, wherein the gate is electrically isolated from the shield; and
gate dielectric layer in the trench, the gate dielectric layer separating the gate from the semiconductor material; and
an electrically non-conductive shield isolation layer which separates the gate from an angled surface of a contact portion of the shield, the angled surface extending between the gate bottom surface and the top surface of the substrate, the shield isolation layer extending over the substrate top surface, wherein the shield isolation layer does not extend the length of the trench.