US 11,791,014 B2
Memory devices having variable repair units therein and methods of repairing same
Yesin Ryu, Seoul (KR); Yoonna Oh, Seongnam-si (KR); and Hyunki Kim, Yongin-si (KR)
Assigned to Samsung Electronics Co., Ltd.
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Nov. 8, 2022, as Appl. No. 18/53,498.
Application 18/053,498 is a continuation of application No. 16/890,559, filed on Jun. 2, 2020, granted, now 11,527,303.
Claims priority of application No. 10-2019-0134559 (KR), filed on Oct. 28, 2019.
Prior Publication US 2023/0069753 A1, Mar. 2, 2023
Int. Cl. G06F 11/00 (2006.01); G11C 29/00 (2006.01); G06F 11/20 (2006.01); G06F 12/10 (2016.01); G11C 17/16 (2006.01); G11C 17/18 (2006.01)
CPC G11C 29/88 (2013.01) [G06F 11/2094 (2013.01); G06F 12/10 (2013.01); G11C 17/16 (2013.01); G11C 17/18 (2013.01); G06F 2201/82 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a first bank including first wordlines;
a second bank including second wordlines;
a third bank including third wordlines;
a first fuse circuit configured to receive a first row address indicating a wordline among the first wordlines and the second wordlines, and perform a first repair operation with a first repair unit when the first row address matches stored failed addresses;
a second fuse circuit configured to receive a second row address indicating a wordline among the third wordlines, and perform a second repair operation with a second repair unit when the second row address matches the stored failed addresses; and
wherein the first repair unit is a 2n-wordline pair unit and the second repair unit is a 2-wordline pair unit, where “n” is a positive integer greater than one.