US 11,791,013 B2
Storage devices and methods of operating storage devices
Seungjun Oh, Seongnam-si (KR); Jihwa Lee, Namyangju-si (KR); and Kyungduk Lee, Seoul (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Jul. 22, 2021, as Appl. No. 17/382,868.
Claims priority of application No. 10-2020-0181841 (KR), filed on Dec. 23, 2020.
Prior Publication US 2022/0197541 A1, Jun. 23, 2022
Int. Cl. G11C 29/02 (2006.01); G11C 29/00 (2006.01); G06F 3/06 (2006.01); G11C 29/12 (2006.01); G11C 29/48 (2006.01); G01R 31/52 (2020.01)
CPC G11C 29/702 (2013.01) [G06F 3/0679 (2013.01); G11C 29/022 (2013.01); G11C 29/1201 (2013.01); G11C 29/12005 (2013.01); G11C 29/48 (2013.01); G01R 31/52 (2020.01)] 20 Claims
OG exemplary drawing
 
1. A storage device comprising:
a plurality of nonvolatile memory devices, each including a plurality of pins;
a storage controller circuit configured to control the plurality of nonvolatile memory devices, wherein the storage controller circuit includes a plurality of connection terminals, each of the plurality of connection terminals is commonly connected to a corresponding set of pins, from among the pluralities of pins included in the plurality of nonvolatile memory devices, via a corresponding connection node, from among a plurality of connection nodes, wherein the pins included in each set of pins have a same attribute, and wherein each connection node from among the plurality of connection nodes is configured to generate a merged signal by merging a plurality of signals; and
a leakage detection circuit configured to determine whether leakage occurs at each set of pins based on the merged signal generated by the connection node connected to each set of pins, and configured to provide the storage controller circuit with a detection signal indicating a result of the determination,
wherein the storage controller circuit includes a register and is further configured to,
store leakage information on whether the leakage occurs at each set of pins in the register, and
change an operation mode of the plurality of nonvolatile memory devices based on leakage information.