US 11,790,995 B2
Memory with a source plate discharge circuit
Michael A. Smith, Boise, ID (US); and Vladimir Mikhalev, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Aug. 12, 2021, as Appl. No. 17/400,924.
Prior Publication US 2023/0046480 A1, Feb. 16, 2023
Int. Cl. G11C 16/04 (2006.01); G11C 16/14 (2006.01); H01L 29/735 (2006.01)
CPC G11C 16/14 (2013.01) [G11C 16/0483 (2013.01); H01L 29/735 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a plurality of memory cells;
a source plate electrically coupled to the plurality of memory cells; and
a discharge circuit including a bipolar junction transistor device electrically coupled to the source plate,
wherein the bipolar junction transistor device is configured to drop a voltage at the source plate by discharging current through the bipolar junction transistor device.