CPC G11C 7/222 (2013.01) [G11C 7/1096 (2013.01)] | 9 Claims |
1. A semiconductor device comprising:
a shifting control signal generation circuit configured to generate a quotient code and a remainder code based on a pulse generation period;
a pre-shifting circuit configured to generate a shifting operation flag by shifting an operation flag by a pre-shifting period set based on the remainder code, in synchronization with a first divided dock; and
a shifting circuit configured to generate an auto-precharge pulse by shifting the shifting operation flag by a shifting period set based on the quotient code, in synchronization with a third divided clock.
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