US 11,790,139 B1
Predicting a performance metric based on features of a circuit design and explaining marginal contributions of the features to the prediction
Satish Sivaswamy, Fremont, CA (US); and Garik Mkrtchyan, Fremont, CA (US)
Assigned to XILINX, INC., San Jose, CA (US)
Filed by Xilinx, Inc., San Jose, CA (US)
Filed on Apr. 18, 2022, as Appl. No. 17/722,651.
Int. Cl. G06F 30/31 (2020.01); G06F 30/343 (2020.01)
CPC G06F 30/31 (2020.01) [G06F 30/343 (2020.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
determining a plurality of features of a circuit design by a design tool executing on a computer;
applying a first model to the features by the design tool, wherein the first model indicates a predicted value of a performance metric based on the plurality of features;
applying an explanation model to the features by the design tool, wherein the explanation model indicates levels of contributions by the features to the predicted value of the performance metric, respectively;
selecting a feature of the plurality of features by the design tool based on the respective levels of contributions;
looking up by the design tool, a recipe associated with the feature in a database having possible features associated with recipes; and
processing the circuit design by the design tool according to the recipe into implementation data that is suitable for making an integrated circuit (IC).