US 11,789,862 B2
Power-on-time based data relocation
Kishore Kumar Muchherla, Fremont, CA (US); Renato C. Padilla, Folsom, CA (US); Sampath K. Ratnam, Boise, ID (US); Saeed Sharifi Tehrani, San Diego, CA (US); Peter Feeley, Boise, ID (US); and Kevin R. Brandt, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jun. 7, 2022, as Appl. No. 17/834,794.
Application 17/834,794 is a continuation of application No. 16/175,579, filed on Oct. 30, 2018, granted, now 11,379,355.
Prior Publication US 2022/0300415 A1, Sep. 22, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 12/02 (2006.01); G06F 12/121 (2016.01); G06F 3/06 (2006.01)
CPC G06F 12/0246 (2013.01) [G06F 3/0614 (2013.01); G06F 3/0646 (2013.01); G06F 3/0683 (2013.01); G06F 12/121 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a memory device comprising a plurality of segments; and
a processing device, operatively coupled with the memory device, to perform operations comprising:
determining a total estimated occupancy value of a first segment of the plurality of segments of the memory device by applying a scaling factor to a total segment power-on-time (POT) value of the first segment, wherein the scaling factor is based on an expected amount of time for which the system is powered on during a given period of time, the total estimated occupancy value indicating how long data has been stored on the first segment;
determining whether the total estimated occupancy value of the first segment satisfies a threshold criterion; and
responsive to determining that the total estimated occupancy value of the first segment satisfies the threshold criterion, relocating the data stored on the first segment to a second segment of the plurality of segments of the memory device.