CPC G06F 11/27 (2013.01) [G06F 1/12 (2013.01); G06F 13/20 (2013.01)] | 21 Claims |
1. An apparatus, comprising:
a built in self test (BIST) circuit for core circuitry of an integrated circuit device, the BIST circuit including a test interface, one or more inputs, and one or more outputs, the BIST circuit configured to operate at a first speed; and
a glue circuit configured to interface with the test interface, the one or more inputs, and the one or more outputs of the BIST circuit, the glue circuit configured to convert between second speed test interface signals and second speed input/output signals operating at a second speed and first speed test interface signals and first speed input/output signals operating at the first speed, the second speed different from the first speed.
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