CPC G06F 9/30181 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G06F 8/65 (2013.01); G06F 9/445 (2013.01)] | 20 Claims |
1. A memory system comprising:
a NAND memory die, the memory die comprising one or more hardware processors configured to perform one or more operations by a set of instructions and configured to perform operations of:
receiving a command from a memory controller to update the set of instructions, the command including a location of an updated set of instructions in a page buffer of the memory die;
responsive to receiving the command, updating the set of instructions based upon the updated set of instructions in the page buffer; and
executing the updated set of instructions in the page buffer.
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