US 11,789,658 B2
Peripheral component interconnect express (PCIe) interface system and method of operating the same
Yong Tae Jeon, Icheon-si (KR); and Ji Woon Yang, Icheon-si (KR)
Assigned to SK HYNIX INC., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Nov. 9, 2021, as Appl. No. 17/522,810.
Claims priority of application No. 10-2021-0048080 (KR), filed on Apr. 13, 2021; and application No. 10-2021-0070686 (KR), filed on Jun. 1, 2021.
Prior Publication US 2022/0326885 A1, Oct. 13, 2022
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0625 (2013.01); G06F 3/0634 (2013.01); G06F 3/0635 (2013.01); G06F 3/0679 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A peripheral component interconnect express (PCIe) interface system comprising a PCIe interface device, a host, and a non-volatile memory express (NVMe) device connected to the host through the PCIe interface device,
wherein the host comprises:
a host memory configured to store information on a command to be executed on the NVMe device and a command that has been executed on the NVMe device; and
an NVMe driver configured to transmit the command to be executed on the NVMe device to the host memory, and output a doorbell signal indicating that the command to be executed on the NVMe device has been stored in the host memory to the NVMe device, and
wherein the NVMe device is configured to request to the host memory to register a lightweight notification (LN) indicating a position in which the command to be executed on the NVMe device is stored and receive an LN message indicating that the command to be executed on the NVMe device is stored in the host memory, from the host memory, prior to the doorbell signal.