| CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01)] | 17 Claims |
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1. A memory device, comprising:
a memory cell array including a plurality of memory cells;
a peripheral circuit coupled to the memory cell array and configured to perform an operation on a selected memory cell among the plurality of memory cells;
a register configured to store information on a voltage to be used for the operation;
an operation processor in communication with the register to receive the information on the voltage for the operation and in communication with a memory controller outside the memory device to receive a command to perform the operation from the memory controller and configured to change the voltage stored in the register in response to a voltage change command received prior to the command from the memory controller, and to control the peripheral circuit to perform the operation on the selected memory cell using the voltage and generate status information related to a status of the operation;
a voltage information generator in communication with the register and configured to compare the voltage stored in the register with a preset voltage range, determine whether the voltage is within the preset voltage range, and generate voltage information indicating a result of a comparison; and
a status register in communication with the voltage information generator and configured to store the status information and the voltage information,
wherein the operation processor is configured to generate the status information indicating a failure of the operation based on the result of the comparison indicating that the voltage stored in the register is not within the preset voltage range.
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