US 11,789,637 B2
Controller and operation method thereof
Jae Wan Yeon, Gyeonggi-do (KR); Do Hun Kim, Gyeonggi-do (KR); Ju Hyun Kim, Gyeonggi-do (KR); and Jin Yeong Kim, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Nov. 29, 2021, as Appl. No. 17/536,712.
Claims priority of application No. 10-2021-0079965 (KR), filed on Jun. 21, 2021.
Prior Publication US 2022/0404972 A1, Dec. 22, 2022
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/065 (2013.01) [G06F 3/0619 (2013.01); G06F 3/0656 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01)] 21 Claims
OG exemplary drawing
 
1. An operation method of a controller controlling a memory device including multi-level cells programmed with data through a multi-step program operation, the operation method comprising:
buffering data chunks to be programmed in the multi-level cells in a write buffer;
backing up at least one backup data chunk of the data chunks to a backup memory which is distinguished from the write buffer;
determining a program sequence of the data chunks, the program sequence for programming at least one non-backup data chunk of the data chunks to the multi-level cells through a second step program operation of the multi-step program operation; and
controlling the memory device to program the data chunks in the multi-level cells, based on the program sequence, by performing first and second step program operations of the multi-step program operation in a first page of the multi-level cells, the second step program operation performed in the first page later than another first step program operation performed in a second page subsequent to the first page.