| CPC G06F 1/12 (2013.01) [G06F 1/06 (2013.01)] | 16 Claims |
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1. A circuit configurable to interface first scan elements in a first clock domain clocked by a first clock signal and second scan elements in a second clock domain clocked by a second clock signal to form a whole or portion of a scan chain for a shift operation, comprising:
a first clock gating device clocked by the first clock signal and configured to generate one or more first clock pulses when a shift enable signal is active;
a first transition detecting device clocked by the second clock signal and configured to generate one or more shift gating pulses when detecting active transitions of the one or more first clock pulses, width of each of the one or more shift gating pulses being equal to a clock period of the second clock signal;
a second clock gating device clocked by the second clock signal and configured to generate one or more shift clock pulses based on the one or more shift gating pulses to clock the second scan elements for the shift operation; and
a first retiming device triggered by active pulse edges of the first clock signal and configurable to hold a value to be shifted into one of the second scan elements from one of the first scan elements for each of the one or more first clock pulses during the shift operation.
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