CPC G01R 31/318513 (2013.01) [G01R 31/3191 (2013.01)] | 18 Claims |
1. A multi-chip system comprising:
a plurality of chips, comprising at least a first chip and a second chip, wherein an output port of the first chip is connected to an input port of the second chip via a chip-to-chip connection, the first chip is arranged to transmit an output signal to the second chip via the chip-to-chip connection, and the second chip is arranged to process an input signal that is derived from the output signal transmitted via the chip-to-chip connection; and
a monitoring and calibration system, arranged to calibrate a chip setting of at least one of the first chip and the second chip for pulse width calibration of the input signal.
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