US 11,789,054 B2
Circuit for measuring a resistance
Alberto Maccioni, AE Eindhoven (NL); Monica Schipani, AE Eindhoven (NL); and Giuseppe Pasetti, AE Eindhoven (NL)
Assigned to AMS SENSORS UK LIMITED, Cambridge (GB)
Appl. No. 16/977,313
Filed by ams Sensors UK Limited, Cambridge (GB)
PCT Filed Mar. 12, 2019, PCT No. PCT/EP2019/056149
§ 371(c)(1), (2) Date Sep. 1, 2020,
PCT Pub. No. WO2019/185347, PCT Pub. Date Oct. 3, 2019.
Claims priority of application No. 18165049 (EP), filed on Mar. 29, 2018.
Prior Publication US 2021/0011066 A1, Jan. 14, 2021
Int. Cl. G01R 27/14 (2006.01); H03K 17/687 (2006.01); H03M 3/00 (2006.01)
CPC G01R 27/14 (2013.01) [H03K 17/6871 (2013.01); H03M 3/30 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A circuit for measuring a resistance, comprising:
a resistive element having a resistance to be measured;
a sensor circuit to generate a differential voltage dependent on the resistance of the resistive element, the sensor circuit comprising:
a first and a second path each including a diode element and an output terminal, one of the first and second paths including the resistive element;
a reference circuit to generate a differential reference voltage, the reference circuit comprising:
a first and a second path each including a current source and a diode element the current sources configured to supply a substantially different current;
a first and a second output terminal the first output terminal configured to selectively supply a voltage from one of the first and second paths of the reference circuit and the second output terminal configured to selectively supply a voltage from the other one of the first and second paths of the reference circuit;
a sigma-delta converter circuit comprising a first stage and a downstream connected second stage,
the first stage comprising:
a first and a second capacitor and an integration element the first capacitor selectively coupled to one of the output terminals of the sensor circuit the second capacitor to one of the first and second output terminals of the reference circuit; and
the second stage comprising an output terminal configured to provide a bitstream dependent on the resistance to be measured.