US 10,433,420 B2
Circuit board device and printed wiring board
Kentaro Toda, Yokohama (JP); Kenji Arai, Yokohama (JP); Manabu Miyazawa, Yokohama (JP); Kenichiro Nagatomo, Yokohama (JP); Toru Ueno, Yokohama (JP); Tsuguto Maruko, Yokohama (JP); Hirofumi Ogawa, Yokohama (JP); and Tetsuo Oomori, Yokohama (JP)
Assigned to LAPIS Semiconductor Co., Ltd., Yokohama (JP)
Filed by LAPIS Semiconductor Co., Ltd., Yokohama (JP)
Filed on Feb. 19, 2019, as Appl. No. 16/279,176.
Claims priority of application No. 2018-27561 (JP), filed on Feb. 20, 2018.
Prior Publication US 2019/0261507 A1, Aug. 22, 2019
Int. Cl. H05K 1/02 (2006.01); H01L 23/522 (2006.01); G06F 1/26 (2006.01)
CPC H05K 1/0298 (2013.01) [G06F 1/26 (2013.01); H01L 23/5226 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A printed wiring board comprising:
a primary layer which has a first region on which an IC chip is mounted and a second region adjacent to the first region;
a first wiring which is provided across the first region and the second region of the primary layer of the printed wiring board;
a second wiring which is provided in the second region of the primary layer of the printed wiring board;
a first via which passes through the primary layer of the printed wiring board to be connected to the first wiring of the first region;
a second via which passes through the primary layer of the printed wiring board to be connected to the second wiring; and
a ground layer which is provided on an opposite side of the first wiring and the second wiring with respect to the primary layer and is electrically connected to the first wiring and the second wiring through the first via and the second via.