US 11,758,741 B2
Dimension control for raised lines
Ahmed Nayaz Noemaun, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Sep. 3, 2021, as Appl. No. 17/466,645.
Application 17/466,645 is a division of application No. 16/298,299, filed on Mar. 11, 2019, granted, now 11,121,181.
Prior Publication US 2022/0059614 A1, Feb. 24, 2022
Int. Cl. H10B 63/00 (2023.01); H10B 53/20 (2023.01); H10B 53/30 (2023.01); H10N 70/00 (2023.01); H10N 70/20 (2023.01)
CPC H10B 63/845 (2023.02) [H10B 53/20 (2023.02); H10B 53/30 (2023.02); H10N 70/063 (2023.02); H10N 70/231 (2023.02); H10N 70/245 (2023.02); H10N 70/826 (2023.02); H10N 70/841 (2023.02); H10N 70/882 (2023.02)] 20 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a first pillar comprising a first memory cell coupled with a first conductive line and a second conductive line that each comprise a first conductive material;
a second pillar comprising a second memory cell coupled with the second conductive line and a third conductive line that comprises the first conductive material; and
a second conductive material below the second conductive line, at least a portion of the second conductive material extending below an upper surface of the first pillar and an upper surface of the second pillar at a location between the first pillar and the second pillar.