CPC H10B 41/27 (2023.02) [H01L 27/0605 (2013.01); H10B 41/35 (2023.02)] | 29 Claims |
1. An electronic device, comprising:
an array of memory cells comprising:
tiers of alternating conductive materials and dielectric materials;
another dielectric material in contact with the tiers of alternating conductive materials and dielectric materials;
a first barrier material on and in contact with opposing sidewalls of the another dielectric material, the first barrier material comprising delta-doped aluminum gallium nitride or delta-doped aluminum gallium oxide;
a channel material laterally proximate to the tiers and comprising a heterogeneous semiconductive material varying in composition across a width thereof; and
a plug material below the channel material, the plug material interposed between portions of the first barrier material on the opposing sidewalls of the another dielectric material.
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