US 11,758,716 B2
Electronic devices including vertical memory cells and related methods
Adam W. Saxler, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Aug. 29, 2019, as Appl. No. 16/555,033.
Claims priority of provisional application 62/727,367, filed on Sep. 5, 2018.
Prior Publication US 2020/0075617 A1, Mar. 5, 2020
Int. Cl. H01L 27/06 (2006.01); H10B 41/27 (2023.01); H10B 41/35 (2023.01)
CPC H10B 41/27 (2023.02) [H01L 27/0605 (2013.01); H10B 41/35 (2023.02)] 29 Claims
OG exemplary drawing
 
1. An electronic device, comprising:
an array of memory cells comprising:
tiers of alternating conductive materials and dielectric materials;
another dielectric material in contact with the tiers of alternating conductive materials and dielectric materials;
a first barrier material on and in contact with opposing sidewalls of the another dielectric material, the first barrier material comprising delta-doped aluminum gallium nitride or delta-doped aluminum gallium oxide;
a channel material laterally proximate to the tiers and comprising a heterogeneous semiconductive material varying in composition across a width thereof; and
a plug material below the channel material, the plug material interposed between portions of the first barrier material on the opposing sidewalls of the another dielectric material.