US 11,758,308 B2
Systems and methods for improving frequency response of a high-speed data acquisition device
Erin C. McPhalen, Victoria (CA)
Assigned to Schneider Electric USA, Inc., Boston, MA (US)
Filed by Schneider Electric USA, Inc., Boston, MA (US)
Filed on Oct. 24, 2019, as Appl. No. 16/662,921.
Claims priority of provisional application 62/914,194, filed on Oct. 11, 2019.
Prior Publication US 2021/0112317 A1, Apr. 15, 2021
Int. Cl. G01R 27/32 (2006.01); H04Q 9/00 (2006.01); G01R 13/02 (2006.01); H04B 1/00 (2006.01)
CPC H04Q 9/00 (2013.01) [G01R 13/0272 (2013.01); G01R 27/32 (2013.01); H04B 1/0021 (2013.01); H04B 1/0042 (2013.01); H04Q 2209/30 (2013.01); H04Q 2209/60 (2013.01)] 27 Claims
OG exemplary drawing
 
1. A method for improving frequency response of a high-speed data acquisition device in a metering device, the metering device for use in a power system, the method comprising:
sampling signals received at an input of the high-speed data acquisition device at a first sampling rate using a measurement circuit of the high-speed data acquisition device, the measurement circuit including an anti-aliasing filter implemented using a network of resistors and capacitors wherein the received input signals include signals received from one or more loads in the power system;
generating, at an output of an analog-to-digital converter (ADC) coupled to the measurement circuit, a digital data stream representative of the sampled input signals wherein the generated signals are indicative of one or more monitored parameters of the sampled signals;
interpolating the digital data stream to generate an interpolated digital signal with a higher sample rate than the first sampling rate;
applying a selected response characteristic arbitrary magnitude finite impulse response (FIR) filter to the interpolated digital signal to generate a filtered digital signal, the filtered digital signal used to correct for both the parasitic errors caused by the network of resistors and capacitors and the anti-aliasing filter response within the measurement circuit;
decimating the filtered digital signal to reduce the sampling rate of the filtered digital signal and generate a decimated digital signal;
providing the decimated digital signal for configuring one or more of the monitored parameters, and
wherein the decimated signal indicates a power quality issue in the power system, and the controller is responsive by adjusting the one or more of the monitored parameters in the power system to reduce the effects of the power quality issue.