CPC H04N 19/126 (2014.11) [H04N 19/103 (2014.11); H04N 19/107 (2014.11); H04N 19/176 (2014.11); H04N 19/18 (2014.11); H04N 19/184 (2014.11); H04N 19/30 (2014.11); H04N 19/463 (2014.11); H04N 19/59 (2014.11); H04N 19/593 (2014.11); H04N 19/597 (2014.11); H04N 19/70 (2014.11)] | 4 Claims |
1. An image processing device, comprising:
a memory; and
processing circuitry configured to
set a 16×16 quantization matrix corresponding to a 16×16 transform unit by performing a nearest neighbor interpolation process in which each element of a first 8×8 quantization matrix is copied as a value for its 3 neighboring elements in a case where the 16×16 transform unit is selected when image data is to be orthogonally transformed and set a 32×32 quantization matrix, which corresponds to a 32×32 transform unit, by performing a nearest neighbor interpolation process in which each element of a second 8×8 quantization matrix is copied as a value for its 15 neighboring elements in a case where the 32×32 transform unit is selected when the image data is to be orthogonally transformed;
quantize transform coefficient data generated by orthogonally transforming the image data in 16×16 transform units using the 16×16 quantization matrix and quantize coefficient data generated by orthogonally transforming the image data in 32×32 transform units using the 32×32 quantization matrix to generate quantized data; and
encode the quantized data to generate a bitstream which includes the first 8×8 quantization matrix and the second 8×8 quantization matrix.
|