US 11,757,685 B1
System level optimization for training a high-speed data communication interface
Sandor Farkas, Round Rock, TX (US); and Bhyrav Mutnury, Austin, TX (US)
Assigned to Dell Products L.P., Round Rock, TX (US)
Filed by DELL PRODUCTS L.P., Round Rock, TX (US)
Filed on Apr. 26, 2022, as Appl. No. 17/729,146.
Int. Cl. H04L 27/01 (2006.01); H04L 27/14 (2006.01); H04L 27/12 (2006.01)
CPC H04L 27/01 (2013.01) [H04L 27/12 (2013.01); H04L 27/14 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An information handling system, comprising:
a high-speed data communication link including a plurality of lanes, each lane including a transmitter having a first equalization setting and a receiver having a data eye sampler; and
a processor configured to initiate a training of the high-speed data communication interface to determine a first setting value for the first equalization setting for each lane, to determine a lane quality value for each lane in response to the training based upon the associated first setting value, to determine a link score based on the lane quality values, to determine that the lane quality score is outside a threshold range, and, in response to determining that the lane quality score is outside the threshold range, to select a first lane, the first lane having a first lane quality value that has a greater magnitude than the lane quality values of all other lanes, to increase the first equalization setting of the first lane, and to initiate a retraining of the other lanes.