CPC H04L 7/0054 (2013.01) [G06N 20/00 (2019.01); H04L 43/106 (2013.01)] | 35 Claims |
1. A processing apparatus, comprising:
a network interface to send data packets to, and receive data packets from a packet network;
processing circuitry to process an event, and comprising packet processing pipeline circuitry to process a data packet;
a timestamping unit to generate a timestamp for the event and the data packet;
at least one register to store at least one parameter describing a hardware state of the processing circuitry, the at least one parameter being at least one packet processing pipeline parameter describing a state of the packet processing pipeline circuitry; and
timestamp correction processing circuitry to: compute a time value as a correction to the generated timestamp responsively to the at least one packet processing pipeline parameter.
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