CPC H03K 19/1776 (2013.01) [G11C 11/1675 (2013.01); G11C 13/0069 (2013.01); H03K 19/17724 (2013.01); H03K 19/17784 (2013.01); G06F 21/78 (2013.01)] | 14 Claims |
1. A configuration bit, comprising:
at least four resistive elements,
wherein at least two first resistive elements are electrically connected in series via a first electrode and at least two second resistive elements are electrically connected in series via a second electrode,
wherein the at least two first resistive elements are electrically connected in parallel to the at least two second resistive elements via a third electrode and a fourth electrode;
a voltage amplifier; and
an inverter electrically connected to an output of the voltage amplifier,
wherein the first electrode and the second electrode are electrically connected to a voltage supply, and
wherein the third electrode and the fourth electrode are electrically connected to an input of the voltage amplifier,
wherein the inverter is in a state indicative of a value based on:
a positive voltage input to the first electrode and the second electrode from the voltage supply,
a negative voltage output or a positive negative output from the third electrode and the fourth electrode to the voltage amplifier,
a voltage output from the voltage amplifier equal to zero voltage or equal to a positive drain voltage, and
shorted resistive elements either (1) between the first electrode and the fourth electrode and between the second electrode and the third electrode; or (2) between the first electrode and the third electrode and between the second electrode and the fourth electrode.
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