CPC H01L 21/823807 (2013.01) [H01L 21/823814 (2013.01); H01L 27/092 (2013.01); H01L 29/0665 (2013.01); H01L 29/42392 (2013.01); H01L 29/66742 (2013.01); H01L 29/78618 (2013.01); H01L 29/78681 (2013.01); H01L 29/78696 (2013.01)] | 20 Claims |
1. A method for forming heterogeneous complementary FETs using a compact stacked nanosheet process, the method comprising:
forming, on a first sacrificial layer and over a substrate, a layered nanosheet stack comprising at least two layers of a first channel material alternating with at least two layers of a second channel material;
depositing a dielectric layer on a top layer of the nanosheet stack;
forming a checkered mask material with at least a first and a second row above the dielectric material, wherein the first and the second row are distanced from each other;
removing the first channel material and the second channel material outside an area of the checkered mask material resulting in at least a first row of pillars and a second row of pillars of layered nanosheet stacks;
depositing a covering material over each of the dielectric layer over each of the separate pillars of layered nanosheet stacks, wherein the covering material also covers sidewalls of the rows of layered nanosheet stacks, the sidewalls being positioned in parallel to a long extension of the first row and the second row and orthogonal to the substrate; and
selectively removing in each of the pillars of the first row the second channel material.
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